1. Field of the Invention
The present invention relates to a semiconductor memory module wherein a semiconductor chip is mounted on a module substrate.
2. Description of the Background Art
A semiconductor memory device is, in many cases, utilized in a personal computer, a workstation or the like. In addition, in recent years the speed, degree of compactness and number of functions of personal computers have increased and, therefore, semiconductor memory devices have been required to further increase their memory capacity. In addition, the market has expanded so that a large number of low-cost memory devices are used. Therefore, further increase in the capacity of, and further reduction in costs of, semiconductor memory devices have become required.
The number of DRAMs (Dynamic Random Access Memory), from among the above described semiconductor memory devices, utilized in personal computers or the like has increased because it is advantageous from the point of view of cost per bit unit. Cost per bit unit can be reduced by increasing the diameter of wafers even in the case that the capacity is increased and, therefore, DRAMs are frequently utilized.
In a DRAM, however, cost of development, cost for high level institutions and the like have greatly increased together with the increase in the testing period of time and test costs accompanying the increase in capacity as well as the enhancement of microscopic processing technology so that whether or not those costs can be reduced has become a problem.
The bit configuration for the input to or output from a DRAM is conventionally 4 bits, 8 bits or 16 bits and, therefore, the variety in types of bit numbers is small so that one module is normally formed of a plurality of DRAMs for general utilization. Thus, a semiconductor memory device such as a DRAM is, in many cases, utilized in a module condition.
FIGS. 19 and 20 show an example of a conventional semiconductor memory module. The conventional semiconductor module has a structure, wherein single chips 117, in which bare chips 101, mounting islands 104, bonding wires 105 and lead frames 110 are molded into mold resin 108, are mounted on a module substrate 102, such as of an SOP (Small Outline Package) or a TSOP (Thin Small Outline Package) corresponding to a surface mounting technology wherein parts can be mounted on both sides of a printed circuit board.
In addition, development has progressed of a memory package having a basic tendency toward miniaturization and thinning together with enhancement of performance and of functions of a memory chip. Then, though an insertion system has been adopted for a memory package, in recent years the forms of packages have greatly changed such that a surface mounting system has started to be adopted.
At present, the surface mounting system has become the main trend in place of the insertion system and further miniaturization and lightening of a package are strongly required. Up to the present, simplification of design and increase in reliability, as well as reduction in cost, have been achieved by utilizing a semiconductor memory module.
In addition, in a conventional manufacturing process of a semiconductor memory module, in the case that a defective chip is discovered in a module test after the manufacture of a semiconductor memory module, testing and replacement of such a defective chip are carried out until such defect has been removed.
There is a problem wherein a great amount of time and effort are required for the replacement of a memory chip that has been detected as being defective according to the above described conventional manufacturing process of a semiconductor memory module. Furthermore, though there is a memory module in the form of a COB (Chip On Board) as a semiconductor memory module with which high density mounting can easily be carried out, there is a problem wherein a bare chip that has been detected as being defective cannot be repaired after bare chips have been sealed into a mold resin according to the conventional module in the form of a COB.
With respect to the above described problem, the inventors of the present application examined manufacture of a semiconductor memory module wherein bare chips other than the bare chips that have become defective from among the plurality of bare chips are effectively utilized by newly mounting a good chip even in the case that a chip defect is detected after the chips have been molded into a mold resin.
However, in the case that a new chip for repair is mounted so that a semiconductor module is repaired by mounting the repair chip that substitutes for the entirety of the functions of a bare chip, it is necessary to mount a new repair chip wherein all banks function properly on the module substrate by disabling the functions of the other banks that are not defective when only a portion of banks from among the plurality of banks formed inside of the bare chip is detected as being defective. According to such a repair method, the functions of the banks that are not defective from among the plurality of banks in a bare chip that has been detected as being defective cannot be effectively utilized.
An object of the present invention is to provide a semiconductor memory module wherein, in the case that a portion of banks from among a plurality of banks formed inside of a bare chip is detected as being defective, it is possible to effect repair by mounting a chip for repair that performs functions that substitute for the banks that have become defective while effectively utilizing the functions of the other banks that are not defective.
A semiconductor memory module of the present invention is a semiconductor memory module provided with a module substrate and semiconductor chips mounted on this module substrate.
In addition, the semiconductor chip includes a plurality of banks that can store data and an address input terminal into which a bank specification signal, which specifies in which bank from among the plurality of banks data is stored, is inputted.
In addition, the semiconductor memory module is provided inside or outside of a semiconductor chip with a specific bank activation/deactivation selection circuit that selects whether to make or not a specific bank a specific bank deactivation condition which data that is expected to be stored in the specific bank, which is specified by the bank specification signal, is not allowed to be inputted to the specific bank when the bank specification signal is inputted.
According to the above described configuration, which has a specific bank activation/deactivation selection circuit, a semiconductor chip can be put in a deactivated condition only in the case that a bank specification signal, which specifies a bank that has become defective, is inputted. Therefore, in the case that a substitute semiconductor chip that functions in place of the specific bank is further mounted, the semiconductor memory module can be repaired by effectively utilizing banks other than the specific bank from among the semiconductor chips. In addition, a semiconductor chip does not allow data expected to be stored in a specific bank to be inputted into the semiconductor chip under the deactivated condition and, therefore, the semiconductor chip can be prevented from unnecessarily consuming power.
In the semiconductor memory module, a substitute semiconductor chip may have a plurality of banks, which may include a bank that has become defective in banks other than the bank utilized in place of a specific bank from among the plurality of banks.
According to the above described configuration, when a semiconductor memory module is repaired, a semiconductor chip detected to include a defective bank can be used as a substitute semiconductor chip. Therefore, a semiconductor memory module can be repaired by effectively utilizing a semiconductor chip wherein a portion of the banks is defective, that is to say, a partially good product, which has conventionally been discarded.
The semiconductor memory module is provided with a specific command control enabling circuit that is a command input circuit into which a plurality of types of commands are inputted and that outputs a signal for controlling a semiconductor chip to be in a controlled condition specified by a particular type of command, regardless of whether or not the specific bank activation/deactivation circuit is in the deactivated condition for a specific bank in the case that a particular type of command from among the plurality of types of commands is inputted.
According to the above described configuration, in the case that a particular type of command is inputted to a semiconductor chip, the semiconductor chip is controlled to be put in the controlled condition based on this particular type of command, regardless of whether or not the specific bank activation/deactivation circuit is in the specific bank deactivating condition. As a result, control of other banks that are not defective can be prevented from causing problems due to the deactivated condition for a specific bank.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.